A conventional driving circuit for driving a voltage driving type semiconductor switching device such as FET, IGBT or the like includes a switching element (hereinafter referred to as “ON-driving element”) for applying an ON-voltage to the gate of a switching element to be driven (hereinafter referred to as “driving target device”) and a switching element (hereinafter referred to as “OFF-driving element”) for applying an OFF-voltage to the gate of the driving target device.
This type of driving circuit controls an ON/OFF state of the driving target device by turning on one of the ON-driving element and OFF-driving element and turning off the other. The switching operation of the voltage driving type semiconductor switching device can be understood as a charging/discharging process of parasitic capacitance occurring between the gate and emitter (gate and source) and between the gate and collector (gate and drain).
That is, when an ON-voltage is applied to the gate of a driving target device through an ON-driving element or when an OFF-voltage is applied to the gate of the driving target device through an OFF-driving element, the gate voltage or gate current varies at a rate based on a time constant determined by the parasitic capacitance of the gate and a resistance component extending to the gate.
As indicated by a broken line of FIG. 28, the gate current of the driving target device has a peak value just after the switching operation of the driving target device has started, and it is then reduced at the rate based on the time constant. Noise occurring at the switching time is more greatly intensified as then variation rate of current flowing in the driving target device and the variation rate of voltage applied to both the ends of the driving target device (a source/drain voltage, a collector/emitter voltage) are higher. When the resistance component described above is low, the peak value and the variation rate are greatly increased. However, a time required for charging/discharging the parasitic capacitance of the gate is short, and thus there is an advantage of reduced switching loss.
Therefore, the noise is generally suppressed by connecting a resistor to the gate (hereinafter referred to as “gate resistor”) to reduce the peak value and variation rate of the gate current. In this case, as indicated by a chain line in FIG. 28, as the resistance of the gate resistor thus connected is increased, the peak value of the gate current is smaller and the time required for charging/discharging the parasitic capacitance of the gate is longer (variation of the gate voltage is moderate), and thus the voltage at both the ends of the driving target device and variation of current are moderate. However, such a driving target device has a drawback of an increased switching loss at the transit time when the ON/OFF state is switched (see FIG. 29).
That is, in the adjustment method using the gate resistor as described above, there is a tradeoff between reduction of noise and reduction of switching loss (high-speed switching). Thus, both of the noise and the switching loss cannot be reduced at the same time.
Furthermore, there is known a gate driving circuit having a gate resistor whose resistance value is adjustable (JP-A-2001-314075 paragraph [0004], FIG. 11, for example). This gate driving circuit is driven as follows. At the switching time of a driving target device (IGBT), the gate resistor is first set to a low resistance value so that the collector-emitter voltage rises up quickly (switched at high speed), and then when the collector-emitter voltage reaches a predetermined value, the gate resistor is switched to a high resistance value to suppress the variation rate of the voltage or current. That is, both the reduction of the switching loss and the reduction of noise are performed at the same time by switching the resistance value of the gate resistor during the switching period.
However, in the gate driving circuit disclosed in JP-A-2001-314075 (hereinafter referred to as “related-art device”), a time period required for turning on or off a voltage driving type semiconductor switching device used as a driving target device is normally set to a short value such as several hundred ns or less, and thus the resistance value must be switched at a good timing within an extremely short switching period in the related-art device. Accordingly, the related-art device must be constructed by elements which operate at high speed to make the gate resistance value variable and also a high-precision sensor for detecting a high voltage, so that the device itself is complicated and high in cost, and also it is difficult to control the device because there is no accessory for control timing.
As described above, the related-art device cannot avoid the tradeoff between the reduction of noise and the reduction of the switching loss because it uses a gate resistor, and thus it cannot be expected to have a great improvement.
Furthermore, the related-art device has a problem in that when the frequency of the switching operation of a driving target element is further increased, a conduction loss at the gate resistor is increased.